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Displays the name of the circuit. The circuit name can be manually assigned or automatically generated.
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For the ONS 15454 SDH, circuit types are HOP (high-order circuit), LOP (low-order circuit), VCT (VC low-order tunnel), VCA (VC low-order aggregation point), OCHNC, HOP_v (high-order VCAT circuit), and LOP_v (low-order VCAT circuit).
For the ONS 15600 SDH, the circuit type is HOP (high-order circuit). LOP (low-order path circuit) is supported only with the ONS 15600 SDH as a pass-through node.
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For the ONS 15454 SDH, low-order circuits are VC11 (with XC-VXC-10G card only), VC12, and VC3. High-order circuit sizes are VC4, VC4-3c, VC4-4c, VC4-6c, VC4-8c, VC4-16c, and VC4-64c. OCHNC sizes are Equipped not specific, Multi-rate, 2.5 Gbps No FEC, 2.5 Gbps FEC, 10 Gbps No FEC, and 10 Gbps FEC. High-order VCAT circuits are VC4-2v and VC4-4c-2v. Low-order VCAT circuits are VC3-2v.
For the ONS 15600 SDH, high-order circuit sizes are VC3, VC4, VC4-4c, VC4-8c, VC4-16c, or VC4-64c. ASAP optical ports also allow circuit sizes of VC4-2c and VC4-3c.
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(ONS 15454 SDH only) For DWDM OCHNCs, the OCHNC wavelength.
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Displays the circuit direction, either two-way or one-way.
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(ONS 15454 SDH only) Displays the OCHNC direction, either East to West or West to East.
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Displays the circuit source in the format: node/slot/port “port name” virtual container/tributary unit group. (The port name appears in quotes.) Node and slot always display; port “port name”/virtual container/tributary unit group might display, depending on the source card, circuit type, and whether a name is assigned to the port. If the circuit size is a concatenated size (VC4-2c, VC4-4c, VC4-8c, etc.) VCs used in the circuit are indicated by an ellipsis, for example, VC4-7..9 (VCs 7, 8, and 9) or VC4-10..12 (VC 10, 11, and 12).
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Displays the circuit destination in the same format ( node/slot/port “port name”/virtual container/tributary unit group) as the circuit source.
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(ONS 15454 SDH only) Displays the number of VLANs used by an Ethernet circuit.
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Displays the number of internode links that constitute the circuit. Right-clicking the column displays a shortcut menu from which you can choose to show or hide the circuit span detail.
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Identifies that a port on the circuit is in loopback.
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Merges the select circuits into the current circuit.
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Updates the Merge tab with current circuits that are available for merging.
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If checked, changes the circuit view in the graphic area to show circuit routing information including source slot, port, and VC. The detailed view also shows working and protect circuit paths. If IEEE 802.17 RPR mode is enabled, the port displays as pRPR East or pRPR West.
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(ONS 15454 SDH only) If checked, displays any low-order path tunnels that carry the low-order path circuit. If the circuit is not carried by a low-order path tunnel, no changes appear when the box is checked.
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(ONS 15454 SDH only) If checked, hides the TXP and MXP connections where high-order and low-order circuits are routed, showing only the logical STM-N links. This check box is available only when circuits are routed on TXP or MXP cards provisioned in section or line mode.
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Displays context-sensitive help.
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