Merge
Use the Merge tab to combine two or more circuits that are aligned in path but are separate circuits because of different circuit IDs or conflicting parameters. A merge combines a single master circuit with one or more circuits.
The circuits that appear in the Merge tab are the circuits available for merging, which are all of the circuits in the network except the following:
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The “master” circuit, which is the circuit chosen on the Circuit tab for editing
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Circuits that are a different circuit size than the master circuit
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Circuits that have a different VLAN, Service Level Agreement (SLA), or monitor designation than the master circuit
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Circuits with a CREATING, DELETING, DROP_PENDING, or ROLL_PENDING status
 
Item
Description
Circuit Name
Displays the name of the circuit. The circuit name can be manually assigned or automatically generated.
Type
For the ONS 15454 SDH, circuit types are HOP (high-order circuit), LOP (low-order circuit), VCT (VC low-order tunnel), VCA (VC low-order aggregation point), OCHNC, HOP_v (high-order VCAT circuit), and LOP_v (low-order VCAT circuit).
For the ONS 15600 SDH, the circuit type is HOP (high-order circuit). LOP (low-order path circuit) is supported only with the ONS 15600 SDH as a pass-through node.
Size
Circuit size.
For the ONS 15454 SDH, low-order circuits are VC11 (with XC-VXC-10G card only), VC12, and VC3. High-order circuit sizes are VC4, VC4-3c, VC4-4c, VC4-6c, VC4-8c, VC4-16c, and VC4-64c. OCHNC sizes are Equipped not specific, Multi-rate, 2.5 Gbps No FEC, 2.5 Gbps FEC, 10 Gbps No FEC, and 10 Gbps FEC. High-order VCAT circuits are VC4-2v and VC4-4c-2v. Low-order VCAT circuits are VC3-2v.
For the ONS 15600 SDH, high-order circuit sizes are VC3, VC4, VC4-4c, VC4-8c, VC4-16c, or VC4-64c. ASAP optical ports also allow circuit sizes of VC4-2c and VC4-3c.
OCHNC Wlen
(ONS 15454 SDH only) For DWDM OCHNCs, the OCHNC wavelength.
Dir
Displays the circuit direction, either two-way or one-way.
OCHNC Dir
(ONS 15454 SDH only) Displays the OCHNC direction, either East to West or West to East.
Protection
Displays the type of circuit protection. See Circuit Protection Types for descriptions.
Status
Displays the circuit status. See Circuit Statuses for descriptions.
Source
Displays the circuit source in the format: node/slot/port “port name” virtual container/tributary unit group. (The port name appears in quotes.) Node and slot always display; port “port name”/virtual container/tributary unit group might display, depending on the source card, circuit type, and whether a name is assigned to the port. If the circuit size is a concatenated size (VC4-2c, VC4-4c, VC4-8c, etc.) VCs used in the circuit are indicated by an ellipsis, for example, VC4-7..9 (VCs 7, 8, and 9) or VC4-10..12 (VC 10, 11, and 12).
Destination
Displays the circuit destination in the same format (node/slot/port “port name”/virtual container/tributary unit group) as the circuit source.
# of VLANs
(ONS 15454 SDH only) Displays the number of VLANs used by an Ethernet circuit.
# of Spans
Displays the number of internode links that constitute the circuit. Right-clicking the column displays a shortcut menu from which you can choose to show or hide the circuit span detail.
State
Displays the circuit state. See Circuit States and Circuit Creation for descriptions.
Loopback
Identifies that a port on the circuit is in loopback.
Merge
Merges the select circuits into the current circuit.
Refresh Aligned Circuits
Updates the Merge tab with current circuits that are available for merging.
Show Detailed Map
If checked, changes the circuit view in the graphic area to show circuit routing information including source slot, port, and VC. The detailed view also shows working and protect circuit paths. If IEEE 802.17 RPR mode is enabled, the port displays as pRPR East or pRPR West.
Show VC LO Topology
(ONS 15454 SDH only) If checked, displays any low-order path tunnels that carry the low-order path circuit. If the circuit is not carried by a low-order path tunnel, no changes appear when the box is checked.
Show WDM Topology
(ONS 15454 SDH only) If checked, hides the TXP and MXP connections where high-order and low-order circuits are routed, showing only the logical STM-N links. This check box is available only when circuits are routed on TXP or MXP cards provisioned in section or line mode.
Help
Displays context-sensitive help.

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